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Supported Hardware Components for i.MX 8M Plus

This page lists the hardware components available on i.MX 8M Plus device.

High-Level Summary​

The virtual i.MX 8M Plus board models the following components:

  • Main CPU Platform

    • 4x Arm Cortex-A53 (TrustZone not implemented)

  • Low Power, Security CPU

    • Arm Cortex-M7

  • External Memory

    • 3 SD/eMMC

  • Connectivity and I/O Peripherals

    • MIPI CSI (4-lanes each)
    • 18 I2S TDM (32 b @ 384 kHz), ASRC, 8-ch. PDM DMIC input, eARC
    • 2 USB 2.0/3.0 Type C
    • 2 GbE (1x TSN)
    • UART x4
note

The following interfaces/IP are not modeled:

  • DSP and NPU
  • ISP
  • PCIe Gen 3
  • Raw NAND

Detailed List of Components​

On-chip resources​

  • Security

    • Resource Domain Controller (RDC)
    • CAAM

  • Arm Platform and Debug

    • Arm Cortex A53 Platform (A53)
    • Arm Cortex M7 Platform (CM7)
    • Messaging Unit (MU)
    • Semaphore (SEMA4)
    • On-Chip RAM Memory Controller (OCRAM)
    • Shared Peripheral Bus Arbiter (SPBA)
    • System Counter (SYS_CTR)

  • Clocks and Power Management

    • Clock Control Module (CCM)
      • PLL and clock root selection modeled for peripherals that use clock frequencies.
    • General Power Controller (GPC)
    • Crystal Oscillator (XTALOSC)
    • Thermal Monitoring Unit (TMU)
      • Returns constant but valid temperature.

  • SNVS, Reset, Fuse, and Boot

    • On-Chip OTP Controller (OCOTP_CTRL)
    • Secure Non-Volatile Storage (SNVS)
    • 6.6 Watchdog Timer (WDOG)
      • Watchdog will cause system reboot / power off.

  • Interrupts and DMA

    • 7.1 Interrupts and DMA Events
      • GICv3 and NVIC modeled.
    • Smart Direct Memory Access Controller (SDMA)
      • Documented features modeled. Model includes ROM.
    • Interrupt Request Steering (IRQ_STEER)

  • Chip I/O and Pinmux

    • IOMUX Controller (IOMUXC)
      • Necessary features modeled (registers, INITVTOR for M7).
    • General Purpose Input/Output (GPIO)

  • External Memory

    • DDR Controller (DDRC)
      • Modeled as block of RAM, no registers.
    • AHB-to-APBH Bridge with DMA (APBH-Bridge-DMA
    • 62BIT Correcting ECC Accelerator (BCH)
      • Modeled for GPMI + APBH_DMA.
    • General Purpose Media Interface (GPMI)
      • Modeled for APBH_DMA with two x8 NAND chips.

  • Mass Storage

    • Enhanced Configurable SPI (ECSPI)
    • FlexSPI Controller (FlexSPI)
    • Ultra Secured Digital Host Controller (uSDHC)

  • Connectivity

    • HSIO BLK_CTRL
    • Universal Serial Bus Controller (USB)
      • Both host and device modes supported.
    • Universal Serial Bus PHY (USB_PHY)
    • PCI Express (PCIe)
    • PCI Express PHY (PCIe_PHY)
      • PHY model only as needed for PCIe operation.
    • Ethernet MAC (ENET)
      • No QoS support, otherwise complete.
    • Ethernet Quality Of Service (ENET_QOS)
      • No QoS/PTP support, otherwise complete.
    • FlexCAN

  • Timers

    • General Purpose Timer (GPT)
    • Pulse Width Modulation (PWM)

  • Display, Imaging, and Camera

    • LCD Interface (LCDIF)
      • Supports RGB output modes in this version.
    • MIPI DSI Host Controller (MIPI_DSI)
    • MIPI D-PHY (MIPI_DPHY)
    • LVDS Display Bridge (LDB)
    • HDMI TX Controller
    • HDMI TX PHY
      • PLL modeled, required for audio operation.
    • HDMI TX BLK_CTRL
    • HDMI TX Parallel Audio Interface (HTX_PAI)
      • Minimal register model
    • HDMI TX Parallel Video Interface (HTX_PVI)
      • The HDMI video output is the AVH video output

  • Audio

    • AUDIO BLK_CTRL
    • PDM Microphone Interface (MICFIL)
      • The PDM microphone input is the AVH audio input.
      • Stereo input is provided. Other channels are silent.
    • Synchronous Audio Interface (SAI)
    • Enhanced Audio Return Channel (eARC)
    • AUD2HTX HDMI audio output
      • Block is undocumented but required in Linux.
      • The HDMI audio output is the AVH audio output.

  • Low-Speed Communication and Interconnects

    • I2C Controller (I2C)
    • Universal Asynchronous Receiver/Transmitter (UART)

Off-chip resources​

  • ONFI NAND chips for GPMI
  • HDMI monitor (1024×768, 60Hz)
  • USB keyboard + mouse
  • PCA9450 PMIC
  • PCA6416 GPIO expander
  • Wolfson WM8960 audio codec
  • PLL frequency computation is required for SAI3 operation.